Set No: 1 R10
III B.Tech. I Semester Regular Examinations, November/December - 2012COMPUTER ARCHITECTURE & ORGANIZATION (CAO)
(Electronics and Communication Engineering)
Time: 3 Hours Max Marks: 75
Answer any FIVE Questions
All Questions carry equal marks
*****
1 Perform the arithmetic operations:
a. (+52) + (-13)
b. (-52) - (-13)
c. (-24) + (14)
d. (24) + (14) using 2’s complement method
.
2 a) Explain the most common fields found in instruction formats. Take one arithmetic equation and evaluate the arithmetic equation usingzero, one, two or three address instructions.
b) List various registers in a computer along with their purpose.
3 a) What are the design goals for a designer while deciding a hardwired or micro programmed CU for a CPU.
b) Write short notes on micro instruction sequencing.
4 a) Explain Booth multiplication algorithm.
b) Multiply 3×(-7) using Booth multiplication algorithm.
5 a) Give at least four differences between a magnetic-drum and a magnetic-tape unit.
b) Describe in words and by means of a block diagram how multiple matched words can be read out from an associative memory.
6 a) Discuss daisy-chain priority interrupt.
b) Draw a flow chart that describes the sequence ofoperations in the transmitter portion of an asynchronous communication interface.
7 a) List and explain the advantages of multi processors.
b)Write a short note on cache coherence.
8 a) Write a short note on array processors.
b) Differentiate tightly coupled and loosely coupled microprocessors.
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Set No: 2 R10
III B.Tech. I Semester Regular Examinations, November/December - 2012COMPUTER ARCHITECTURE & ORGANIZATION (CAO)
(Electronics and Communication Engineering)
Time: 3 Hours Max Marks: 75
Answer any FIVE Questions
All Questions carry equal marks
*****
1 a) Draw the block diagram of a computer system and explain each of its parts along with their functions.
b) Explain about floating-point representation withexample.
2 Define instruction cycle. Explain the fetch and decode cycles for a register transfer statements show how the register transfer statements are implemented in the bus system. Draw the flowchart for instruction cycle.
3 a) Define the following:
i. Micro operation
ii. Micro instruction
iii. Micro program
iv. Control memory.
b) Explain the selection of address for control memory?
4 a) How many bits are needed to store the result addition, subtraction, multiplication and division of two n-bit unsigned numbers. Prove.
b) What is overflow and underflow? What is the reason?. If the computer is considered as infinite system do we still have these problems?
5 a) What is Virtual Memory? What are the issues behind the usage of this technique?
b) Explain the direct mapping technique with example.
6 Write short notes on the following:
i) IOP (Input-Output-Processor)
ii) DMA Transfer
iii) Serial communication protocols
7 a) Discuss in detail about MESI protocol.
b) List the merits and demerits of multi processors.
8 a) Explain the working of 8 x 8 Omega Switching network.
b) Write short notes on inter processor communication.
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Set No: 3 R10
III B.Tech. I Semester Regular Examinations, November/December - 2012COMPUTER ARCHITECTURE & ORGANIZATION (CAO)
(Electronics and Communication Engineering)
Time: 3 Hours Max Marks: 75
Answer any FIVE Questions
All Questions carry equal marks
*****
1 a) Give the functional organization of a digital computer and explain the function of each element of a computer.
b) Explain about sign magnitude and 2’s complement approaches for representing the fixed point numbers. Why 2’s complement is preferable.
2 Elaborate on different types of registers in a register organization.
3 a) Clearly distinguish between
i. Packed/Unpacked microinstructions
ii. Hard/Soft microprogramming
b) List and briefly explain applications of microprogramming.
4 a) What is the use of fast multiplication circuits.Write about array multipliers.
b) Multiply 10111 with 10011 using booths algorithm.
5 a) What is a virtual memory technique? Explain different virtual memory techniques.
b) Mention and explain the disk performance parameters?
6 a) Describe an asynchronous data transfer using hand shaking with the help of timing diagram.
b) What is Direct Memory Access? Explain the working of DMA.
7 a) Mention and explain the problems in parallel processing?
b) Write about Control Hazard?
8 a) What are the different interconnection structures used in multiprocessors?. Explain about multistage crossbar switch.
b) Write short notes on System bus structure for multiprocessors.
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Set No: 4 R10
III B.Tech. I Semester Regular Examinations, November/December - 2012COMPUTER ARCHITECTURE & ORGANIZATION (CAO)
(Electronics and Communication Engineering)
Time: 3 Hours Max Marks: 75
Answer any FIVE Questions
All Questions carry equal marks
*****
1 a) Explain about various buses such as internal, external, backplane, I/O, system, address, data, synchronous and asynchronous.
b) Give means to identify whether or not an overflow has occurred in 2s complement addition or subtraction operations. Take one example for each possible situation and explain. Assume bit registers.
2 a )What is the need for various addressing modes? Explain various addressing modes with example?
b) Differentiate between RISC and CISC.
3 a) Give the typical horizontal and vertical microinstruction formats
.
b) Describe how microinstructions are arranged in control memory and how they are interpreted.
4 a) Explain booths algorithm with its theoretical basis.
b) Why do we need some bits of current microinstruction to generate address of the next microinstruction. Support with a live example.
5 a) Explain the self-associative mapping technique with about example.
b) Write about magnetic tape.
6 Explain the following:
(i) Isolated Vs Memory mapped I/O
(ii) I/O Bus Vs Memory Bus
(iii)I/O Interface
(iv) Peripheral Devices
7 Briefly explain about the following:
i) Cache Coherence
ii)Vector Computation
8 a) Classify and explain different multiprocessors.
b) Explain the organization of tightly coupled multiprocessor system with a generic block diagram.
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